1. Field of the Invention
The present invention relates to an input circuit which converts a signal. The invention also relates to a display device and an information display apparatus each of which uses such an input circuit. More specifically, the invention relates to an input circuit which is necessary when the output signal of a large-scale integrated circuit (LSI) of low-voltage amplitude is inputted to a thin film transistor (TFT) circuit which operates at a high voltage.
2. Description of the Related Background Art
As a device which displays an input video signal on a two-dimensional plane, there is a display panel, such as a liquid crystal panel or an EL panel, which needs an input circuit for converting an input signal level into a high signal level.
The input circuit used in such a display panel needs to be of the type which converts a signal level, for example, from 5 V to 10 V, in a case where the output signal of an LSI is inputted to a TFT circuit. In particular, a small-sized display panel of the type which is used in a mobile device is desired to have a power saving feature, and is required to use an input circuit of low power consumption. In addition, the input circuit used in the display panel needs to operate in response to a horizontal scanning clock for generating sampling pulses for acquiring an input video signal, and therefore, needs to perform a highest-speed operation.
FIG. 4 shows a related-art input circuit. This input circuit receives, at its input, signals which are inverted with respect to each other and outputted from an LSI circuit which operates at a source voltage VCC2 of approximately 5 V. The input circuit converts the input signals into a signal of a level operable at a source voltage VCC1 of approximately 10 V, and outputs an output signal.
A positive input signal Pi is inputted to a gate of a transistor M100 whose source is connected to ground potential GND, while a negative input signal Ni is inputted to a gate of a transistor M400 whose source is connected to ground potential GND. The drain M100/D (drain of the transistor M100) is connected to a transistor M200 which has a source connected to the source voltage VCC1 and has a gate and a drain shorted together. The gate M200/G is connected to a gate of a transistor M300 whose source is connected to the source voltage VCC1. The drain M300/D and the drain M400/D are connected to each other at an output signal terminal Po. Incidentally, for the convenience of explanation in the present specification, the gate electrode, the source electrode and the drain electrode of each transistor are respectively denoted by shortened symbols /G, /S and /D.
FIG. 5 is a time chart for explanation of the operation of the input circuit shown in FIG. 4. The input signals Pi and Ni are signals which are inverted with respect to each other and outputted from the LSI, and are like a signal (a) whose level transition time is short on a time axis to be described below.
Before time t1, since the signal Pi is at its L level (the signal Ni is at its H level), the transistor M100 is off, the transistor M300 is off, and the transistor M400 is on, so that the output signal terminal Po is at its L level.
At time t1, when the signal Pi goes to its H level (the signal Ni goes to its L level), the transistor M100 is turned on, and the transistor M400 is turned off, so that an M200/G voltage (a gate voltage of the transistor M200) decreases and the transistor M300 starts current driving. Therefore, as shown in (b), the Po voltage starts increasing and reaches the voltage VCC1 at time t2, so that the current driving capability of the transistor M300 disappears.
At time t3, when the signal Pi again goes to the L level (the signal Ni goes to the H level), the transistor M100 is turned off and the transistor M400 is turned on, so that the M200/G voltage increases by self-discharge and the transistor M300 loses its current driving capability. Therefore, as shown in (b), the Po voltage starts decreasing and reaches ground potential GND at time t4, so that the current driving capability of the transistor M400 disappears.
During the period from time t1 to time t3 during which the signal Pi is at the H level, since the transistor M100 decreases the M200/G voltage, current driving continues.
During a period following time t3 at which the signal Pi is at the L level, only the transistor M400 generates current only during the period from time t3 to time t4.
FIG. 6 shows a construction example in which a circuit for converting one input signal into signals which are inverted with respect to each other is provided in the construction shown in FIG. 4.
U.S. Pat. No. 6,373,454 discloses an EL display.